Em 17/10/2011 18:02, Bob Ammerman escreveu:
>> An FPGA isn't necessary. A small CPLD would be enough.
> I'd be concerned about the power consumption of a CPLD with that fast a=20
> clock, although I haven't checked the datasheets.


The Xilinx's CoolRunner devices works almost for free. They are called
"Fast Zero Power".
It was a Philips design bought by Xilinx years ago. There was demo
projects that ran on batteries made of oranges.
Even now their logo uses two orange halves for the "OO" in the
CoolRunner brand.

It was the first fully CMOS PLD design (doesn't use current sense, but
rather true CMOS logic gates inside). The competitors used CMOS
transistors but with the traditional architecture of current sense.


Isaac

--=20
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