ARM is not particularly beautiful imho. Orthogonality is a hallmark of all
well-designed RISC cpus. I don't know if PDP11 falls under this category as=
 it
has pre and post-increment and also conditional branching on nearly all cpu
registers. Just like MIPS cpus ran advanced SGI Unix (Irix) graphical
workstations in the 1990s before becoming the mainstay of embedded linux on=
 SOHO
DSL routers, ARM had a slightly less Unixy history as a more or less direct=
ly
state sponsored cpu for nearly 10 years (in the UK) before taking over the
embedded cell phone market.

The ARM consortium has apparently created and intergrated several additiona=
l ARM
instructions which seem to be meant to prevent third parties from creating
unlicensed compatible silicon. Those extra instructions are patent encumber=
ed
and affect GCC which had to leave them out and provide workarounds afaik. I
cannot quote this from memory but the 'shrinked' ARM instruction sets are a=
ll
'new'. It is also not an accident that one is hard put to locate an ARM cpu
manual which lists opcodes by numeric (binary, hex, etc.) encoding. The
situation with MIPS is exactly the same, extra instructions, GCC affected,
providing workaround implementing the 'new' instructions using old ones etc=
..
Finding binary encodings for mnemonics in a MIPS cpu manual is ALSO hard.

The Chinese ARM or MIPS variant (I forget which), carefully worked around t=
he
patent problem afaik.

Maybe this will cause some new Stallman to implement some competitive open
source CPU which will break the bottleneck and provide the needed functiona=
lity
which everyone will adopt.

  Peter

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