I got the SUMP logic analyzer working on the Nexys 2 relatively quickly. No=
t
very large in terms of code size.

In all honesty, it could have been so much (and still can). The features
were rather disappointing and the triggering was abysmal. Also, they were
using the FPGA's block RAM instead of the onboard (pseudo) SRAM. So 256k
samples IS NOT enough, it seems. Especially with inadequate triggering.

Time to make my own logic analyzer with good triggering and large sample
buffer.

Not going to be easy.
--=20
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