> >>> This is seen as 7 fast sector writes followed by 3 slow onesup on
> th
> >> It is related to the SDcard internal buffer.
> > Hi Nicola. That doesn't explain to me the consistent 7 fast 3 slow
> > pattern. I would have expected something more regular, perhaps
> > not a '10' grouping. If it was 1-1, 7-1 or 15-1 maybe, more 'hex'
> >
> > Joe
> I'm not at all up on this, but it might be base 2 if, for instance,
> there are 8 buffers and filling the 8th (high water mark) causes slow,
> and reducing to 4 hits a low water mark, enabling fast.  Just a BWAG.
> Plus or minus some magnitude of fencepost error.
> Joe W

It certainly sounds to me as though for the 3 slow buffer periods you are f=
ighting the card doing its write. It may well be that the card has a very s=
imple single buffer arrangement for the SPI interface, whereas the 4 bit pa=
rallel interface is optimised for speed (that is where the money is after a=
ll). The SPI interface may even be very old VHDL tacked on the later code j=
ust to maintain compatibility with the standard, so may not perform very fa=
st at all.
--=20
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