> > I haven't tried using it, but I believe any of the PICs that use the De=
bug
> Executive code module can do this, so it has been around for a while.
> >
>=20
> The dsPIC E series have a multi-master memory bus that allows the
> hardware debug executive to spy on the memory in real time, while the
> application is executing code. I believe this is a first unless you
> count the DMCI.

Ah, hadn't picked up on that. On the earlier chips I think it does it as an=
 interrupt routine, using one of the reserved interrupts. I have had a quic=
k look at the E series, but hadn't gone that deep into them. I presume the =
same applies to the 24E series seeing they are on the same data sheet.
--=20
Scanned by iCritical.

--=20
http://www.piclist.com PIC/SX FAQ & list archive
View/change your membership options at
http://mailman.mit.edu/mailman/listinfo/piclist
.