> I don't know this board off-hand, but "special debug header" to me,
> should just be a header, which to me, should mostly be some
> interconnection adapter.  Is there any special logic in these things
> such that some devices cannot be debugged without it?  If so, this
> would certainly affect my choice of chips in the future.
>=20
> Cheers,
> -Neil.

Yes, the 'special logic' is a special version of the chip with extra pins a=
nd the debug logic, which is brought out to those pins. The chip is on a PC=
B that has pins designed to plug into a DIL socket, and has an RJ11 connect=
or on it for the debug port, so you don't lose any of the I/O pins while de=
bugging.

Microchip have been doing these for some time for the 12F and small 16F ser=
ies, and there are even some 24F devices where one needs to do this for deb=
ugging.

For some devices it makes sense to use a larger chip that has the debug cap=
ability to develop the code, then recompile it for the smaller chip, and if=
 need be do 'crash & burn' type debugging for the last stage if absolutely =
necessary.


--=20
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