But RBIF !=3D RCIF or TXIF. There is no rule that RCIF and TXIF must be writeable just becuse RBIF is. The datasheet for 16F690 specificaly says "R/W" f=F6r RABIF (port-change flag for PORTA/B) and "R" for TXIF and RCIF. Jan-Erik. Kerry Wentworth wrote 2011-09-02 14:28: > Are you sure of that? I've not seen it documented anywhere, but I have > set interrupt flags to generate an interrupt. > > For example, using interrupt on PortB change to read an encoder. > Reading/writing PortB for other I/O can cause the interrupt to fail to > occur. By keeping track of the state phase A and B were in at the last > interrupt, you can detect if a change happened that failed to cause an > interrupt. You can then set RBIF =3D 1 and cause an interrupt. I know > for sure it works that way for 16F chips, and see no reason it wouldn't > work with 18F as well. > > Kerry > > > > John Temples wrote: >> On Thu, 1 Sep 2011, Nathan House wrote: >> >> >>> PIR1bits.RCIF =3D 0; // clear the USART receive interrupt flag >>> >> >> RCIF is a read-only bit. You cannot write a zero to it. It reflects >> the state of RCREG: set when there is data waiting to be read, clear >> when there isn't. >> >> TXIF is also read-only. >> >> -- >> John W. Temples, III >> > --=20 http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist .