>     > If you are referring to a specific chip by a specific manufacturer
>     > that implements the ARM Cortex M0 core, then we might be able to he=
lp
>     > you out more.  Each manufacturer appears to have a slightly (or ver=
y)
>     > different interpretation of "UART" so all we can give you are3
>     > generalizations.
>     >
>     > Further, we can't really tell you much about how you should set the
>     > UART up, how much and how to buffer it, and how much functionality
>     > should be in the ISR (except very generally) without more informati=
on
>     > about your application.
>     >
>     > First, generally:
>     >  - How to set up - Setting it up for your desired baud rate should =
be
>     > fairly easy.  Check out each register in the UART, and set each one=
 up
>     > to support your requirements.
>     >  - What type of buffering - If the chip has DMA, you might find DMA
>     > buffering fits your needs.  If not, then you're stuck with whatever
>     > buffering the UART has, plus whatever software buffering you set up=
..
>     > Your application will guide you here - if you need to deal with a l=
ot
>     > of data you'll probably need a lot of buffering, and hopefully DMA.
>     > If your data is fast, but there' not much of it, then you probably
>     > need very little buffering, and doing it in software would be fine.
>     >  - How much functionality in the ISR - it completely depends on you=
r
>     > application, but generally you put the absolute minimum in the ISR =
-
>     > just enough to empty the buffer into a queue and set a flag to noti=
fy
>     > the main app that it has new data.
>     >
>     > It sounds like you might be pretty new to all this - have you worke=
d
>     > with other processors and UARTs before? Can you describe your
>     > application or requirements a bit more?
>     >
>     > -Adam
>     >
>     > On Thu, Aug 4, 2011 at 6:12 PM, JSalisbury
>     > <piclist@jsalisbury.clara.co.uk> wrote:
>     >> Hi,
>     >>
>     >> I am wanting to use the ARM cortex M0 UART at 921.6Kbaud, what is =
the
>     >> best way of arangeing the UART RX, what type of buffering and how =
much
>     >> functionality should be in the ISR?
>     >>
>     >> Thanks
>     >> --
>
>     Hi,
>     I am intending to use the NXP ARM cortex MO processor LPC11XX series.
>     I am expecting small packets of a few bytes say less than 20 at rates
>     of about 100 Hz
>
>     I was expecting to use a simple ISR based round an circular buffer
>     with two sets of index variables. On a uart RX event I would expect t=
o
>     store the data into the circular buffer and increment the uart index
>     variable round the buffer.  In main I was expecting to use
>
>     Interupt off
>     while (uart_index !=3D local_index)
>       {copy byte at local_index
>     local_index++;
>     if (BUFSIZE =3D=3D local_index)
>          { local_index =3D 0}
>
>     }
>       Interupt on
>
>     Could the above be considered in any way unsafe, as a collegue has
>     concerns. My collegue would like to have data processing up to ISO
>     layer 3 or 4 should be in the ISR, this is tall order given that I am
>     expecting bytes at 10us intervals. I am using 921.6Kbaud 8bytes No
>     parity 1 stop bit.
>
>
>
>
>     Thanks
>
>
>
>
> - Done.
>
>


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