Dwayne, Not a dumb question at all. Not only can the lead pitch change, so can the chip body size. I found this= =20 out when I had to go to surface mount and a lot of footprints seemed to be= =20 wrong. I found this standard IPC-7351 at=20 http://landpatterns.ipc.org/IPC-7351BNamingConvention.pdf Names end up being quite long though. Maybe a local variation might have to= =20 be adopted. Mentor Grpahics also have a viewer and wizard for calculating land patterns= ..=20 In the wizard, you can enter the dimensions and tolerances of a given part,= =20 and it will give you a pattern and dimensions, including courtyards, masks,= =20 overlays etc. It also allows you to choose between several different=20 density spacings (ie how densley packed your board has to be). Tom Hausherr seems to be rather knowledgeable in this area. A google search= =20 should find him. Cheers, David ----- Original Message -----=20 From: "Dwayne Reid" To: "pic microcontroller discussion list" Sent: Friday, July 15, 2011 10:30 AM Subject: [EE] TQFP lead pitch variations > Good day to all. > > Got a dumb question here: we just got back some proto boards done > with the PIC 18F67J60. Went to populate the boards - whoops! Got a > problem here. > > The TQFP-64 package that was in the CAD library doesn't match the PIC > received from Digikey. > > Turns out that the TQFP package in the CAD library has a 0.80mm lead > pitch whereas the PIC has a 0.50mm lead pitch. > > Like I said: Whoops! > > So - my co-worker is busy making a new footprint to match the actual > chip. But that has me wondering: how do people define these footprints? > > I did some minor searching via Google and find that we aren't the > only people perplexed by this - Microchip apparently offers TQFP > packages with 4 different lead pitches: 0.40mm, 0.50mm, 0.65mm, 0.80mm. > > I'm looking for suggestions as to how to name these footprints - I'd > like to follow whatever convention has been developed rather than > come up with something totally different from what everyone else uses. > > This particular incident wasn't my mistake but it easily could have > been - I'm sorta used to a package name (eg SOIC) having a specified > lead pitch and I might have decided to skip my usual "check twice" > policy. As it was, I did have a good look at the board layout before > it was sent out and it *NEVER* occurred to me that the PIC footprint > might be wrong. > > dwayne > > --=20 > Dwayne Reid > Trinity Electronics Systems Ltd Edmonton, AB, CANADA > (780) 489-3199 voice (780) 487-6397 fax > www.trinity-electronics.com > Custom Electronics Design and Manufacturing > > --=20 > http://www.piclist.com PIC/SX FAQ & list archive > View/change your membership options at > http://mailman.mit.edu/mailman/listinfo/piclist >=20 --=20 http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist .