Sean Breheny wrote:
> The designers of the PICs thought of this, though, so they feed Out0
> into yet another FF, generating Out1. Then, Out1 fans-out to several
> logic gates which depend on the internal implementation details within
> the PIC.

This is where your chain of suppositions breaks down. The designers of any
proper UART (or any other circuit dealing with asynchronous inputs) would
NOT fan out Out1 to multiple gates, except in carefully controlled ways in
which metastability is taken into consideration.

The main thing Out0 and Out1 would be used for would be to feed a single
gate that functions as an edge detector, and more likely than not, the
output of that gate will be fed through a third FF (call it Out2).

In the specific case of a UART, Out2 is used to synchronize a state machine
that controls all of the rest of the logic of the UART receiver. This inclu=
des
the actual sampling of the data bits from the asynchronous input, making su=
re
that the samples are taken near the middle of each bit window.

The samples are probably taken from Out1, so that most effects of a noisy
input are already filtered out, but as you point out, Out1 may occasionally
be in a metastable state (because of a noise spike, not because of the actu=
al
bit edge).

So let's talk about metastability now. With regard to the edge detector
(Out2), the only effect of metastability is to create a one-clock ambiguity
(jitter) in when it decides that the edge has occurred. The only effect of
this ambiguity is to to shift the sampling point(s) for the data by +/- 1/1=
6
of a bit near the center of the bit window. This is of no consequence
whatsoever.

With regard to the actual data bit sampling from Out1, the only effect of
metastability is to create a bit error, and applications that use UARTs
generally know how to deal with bit errors -- even those that occur in star=
t
bits and stop bits. As a first line of defense, a lot of UARTs actually tak=
e
three samples near the center of each bit cell and do a majority vote among
them.

So, my overall point is, the designers of UARTs and other kinds of interfac=
es
know about metastability and have many techniques for dealing with it. Once
these solutions are in place, plesiochronous operation causes no additional
problems.

-- Dave Tweed
--=20
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