On 2011-07-02, at 8:57 PM, Sean Breheny wrote:

> Let's make things more concrete: let's say I have two PICs
> communicating via their internal USARTs in asynchronous mode.=20

In which case it doesn't matter a jot if the clocks are the same or not. Fr=
om a PIC data sheet on the UART...

"The data recovery block operates at 16 times the baud rate, whereas the ma=
in receive serial shifter operates at the baud rate. After sampling the UxR=
X pin for the Stop bit, the received data in UxRSR is transferred to the re=
ceive FIFO (if it is empty).

The data on the UxRX pin is sampled three times by a majority detect circui=
t to determine if a high or a low level is present at the UxRX pin."

Two things to note -=20
1. the sampling of the data pin is at 16x the baud rate. This is common pra=
ctise for most UARTs and variants.
2. the UART logic is looking for a level not an edge.

However, there are other reasons why a common clock might not be a good ide=
a but it can work out.



--=20
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