On 01/07/2011 02:49, Sean Breheny wrote: > Secondly, I've been taught (and thought I understood properly) that > asynchronous interfaces rely on asynchronicity. In other words, they > actually require randomness over time in the relationship between the > two clock domains. If there is a fixed relationship between the > timebases of the source and destination devices, then there can be > serious problems if this relationship causes them to be off by a > narrow range of time. no. The only issue is the actual physical layout and distribution issues.=20 Using one clock is no issue for inter-cpu communication. If it was, it=20 would be unreliable. RS232 for instance won't care if the clocks are identical. SPI and I2C won't care. --=20 http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist .