On 22/06/2011 16:07, Denny Esterline wrote:
> I've seen lots of people implement soft PWM with this type of scheme, and
> it's always seemed... I was going to say "stupid" but perhaps "silly" is =
a
> better choice, though political correctness may force me to temper that t=
o
> "less than optimum".
>
> With this scheme you have a_ton_  of interrupts. 8 bit resolution gets yo=
u
> 256 interrupts per PWM cycle - which obviously limits the upper frequency
> and burdens the processor for other tasks. I've always preferred a variab=
le
> timer reload approach:

Not if you are doing something else that needs the fixed rate higher=20
speed interrupt. Which is common. Like a Multiplexed LED display or ADC=20
or Frequency counter or simple DSP

Your proposal is a useful alternate scheme.

it's also advantageous to have only one interrupt. But that's another=20
story.
--=20
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