>
> For naive implementation code is little more than:
>
> On_IRQ
>  increment counter ; with rollover to zero
>  if counter =3D 0 then set all PWM output bits high.
>  for all channels
>     if counter >=3D channel_value set relevant PWM bit low.
>
>
>        R
>

Not just to argue with Russel (I couldn't compete in volume alone :-) but
I've seen lots of people implement soft PWM with this type of scheme, and
it's always seemed... I was going to say "stupid" but perhaps "silly" is a
better choice, though political correctness may force me to temper that to
"less than optimum".

With this scheme you have a _ton_ of interrupts. 8 bit resolution gets you
256 interrupts per PWM cycle - which obviously limits the upper frequency
and burdens the processor for other tasks. I've always preferred a variable
timer reload approach:

On_IRQ
If (state_variable)
  Set Pin on
  load timer with "on time"
  state_variable =3D !state_variable
else
  Set Pin off
  load timer with (period time - on time)
  state_variable =3D !state_variable


Obviously that's only a skeleton with some parts "left as an exercise for
the student". With this approach you only have two interrupts per PWM cycle=
,
so obviously much lower overhead. Granted it does require a dedicated timer=
,
but I've never found that to be too much of a bother.

And this approach scales very well for some applications. Hobby RC servo
control for example. I have one application controlling more than a dozen o=
f
them with the same timer.

-Denny
--=20
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