I don't know the processor but made a few of these on the 68000 years=20 ago. :-) http://www.microchip.com/forums/m546064-print.aspx // These are the available exception code values that may appear in the=20 'Cause' // register's ExcCode field which gets read during a general exception=20 error. // Refer to the MIPS 32 M4K processor Core Software User's Manual for more // information on this. 'static' is used in this case because an exception // condition might stop 'auto' variables from being created http://www.mips.com/products/cores/32-64-bit-cores/mips32-m4k/ http://www.mips.com/secure-download/index.dot?product_name=3D/auth/MD00249%= 2D2B%2DM4K%2DSUM%2D02.03.pdf 4.8.8 Bus Error Exception --- Instruction Fetch or Data Access A bus error exception occurs when an instruction or data access makes a=20 bus request and that request terminates in an error. The bus error exception can occur on either an instruction fetch=20 or a data access. Bus error exceptions that occur on an instruction fetch have a higher priority than bus error exceptions=20 that occur on a data access. Bus errors taken on any external access on the M4K core are always precise. Cause Register ExcCode Value: IBE: Error on an instruction reference DBE: Error on a data reference Additional State Saved: None Entry Vector Used: General exception vector (offset 0x180) On 5/27/2011 6:33 PM, Harold Hallikainen wrote: > I get an exception like this now and then and do not have a good > understanding as to what the exception is. Can someone explain it? > > THANKS! > > Harold > > > > =20 --=20 http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist .