Steven Ramon wrote: > I am planning to use a PC18F2455 for RS232. To help save cost and > reduce complexity, I want to use the internal oscillator. However, > I'm concerned about baud rate error. As you should be. The internal RC is not that accurate, especially when yo= u get away from 25 degC. > We'll be operating at 9600 8N1 and 5V signal levels. Note that the absolute baud rate doesn't enter into the error calculation. It's the percentage error that matters. > Can someone point me to documentation that > discusses using the internal oscillator with RS232. I don't know if there's a separate document for that, but probably not sinc= e there's no need. Read the datasheet to see how accurate the internal oscillator is, then look up how RS-232 signalling works. The rest follows quite simply from that. > I've searched for an application note, but haven't found one. No application note is a substitute for the datasheet and your own brain anyway. > Please go easy on me, as I have never used this forum before > and don't even know if it is going to get through. New to the list or not, you still have to READ THE DATASHEET. Everything you are asking about is clearly answered there if you know how RS-232 works= .. It also helps if you give people some understanding of your background and your level of knowledge of electronics, microcontrollers, and PICs in particular. For example, if you said you're a high school senior trying to do a project, then you might get a answer like: Each PIC has this document called the "datasheet" that provides detailed specs, including how accurate the internal oscillator is. See DSxxxx on page yy. RS-232 works like <1 paragraph quick intro>. However if you said you were a professional, then a more appropriate answer would be: This is all in the datasheet, duh. Do I need to spell "RS-232" for you too? To give a brief answer anyway: Since you are using 8N1 signalling, there are 8.5 bit times from the leading edge of the start bit to the middle of the last bit. The receiver needs to sample the last bit within 1/2 bit tim= e or it will sample the wrong bit. That's the guaranteed to fail threshold. It's much better to design the system so that the receiver is not off by more than 1/4 bit at the last sample. 0.25 / 8.5 =3D 2.9%, which is the to= tal baud rate mismatch allowed between sender and receiver for the receiver to sample the last bit within 1/4 bit time. If you know the other end will be right on (like a PC), then you can allocate all of the 2.9% error budget to the PIC. If the PIC will be talking to a like system, then each one is only allwed 1.5% error. Actually it's a little worse than that. Most receiving UARTs use a 16x clock to sample the leading edge of the start bit and then sample subsequen= t bits relative to that. That means there is a additional 1/16 bit error on everything, although this error is non-accumulating. (1/16) / 8.5 =3D 0.74= % error introduced by the 16x sample clock. This eats into your error budget calculated above. Even worse, some PIC UARTs can be configured in "high speed" mode to sample using a 4x clock instead of a 16x clock. That makes the clock sampling error more significant. ******************************************************************** Embed Inc, Littleton Massachusetts, http://www.embedinc.com/products (978) 742-9014. Gold level PIC consultants since 2000. --=20 http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist .