On Sun, 08 May 2011 15:46:28 +0100, you wrote: >On 08/05/2011 15:13, V G wrote: >> On Sun, May 8, 2011 at 9:55 AM, Bob Ammerman = wrote: >>> Any decent size BGA is not going to work on a 2-layer board. >> I'm thinking between 100 and 200 pins. So it needs to be 4 layer? > >At the very least - I made a 2-layer test board for a 64 pin FPGA that=20 >"worked", but for any serious use you need power and ground planes for=20 >decoupling and controlled impedance purposes, plus the extra routing=20 >space. Look into high speed digital techniques and you will see why all=20 >this is necessary. Xilinx should have some relevant documentation on=20 >their site, about the optimum setup for their chips, how many IOs can=20 >switch at once, thermal considerations, etc. QFP packaged FPGAs, however are entirely viable on 2 layers, as long as you= only have one I/O voltage, as this can be on a top-side plane under the chip. --=20 http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist .