On Thu, 2011-05-05 at 21:17 -0700, William "Chops" Westfield wrote:
> >> so I can truly understand what's going on.
>=20
> You might find it helpful to look at some simpler PLD-like devices.
> If you go to the datasheet for a PAL16L8 or similar, it is very
> explicit about what the internal logic looks like, (ORs of internal
> ANDS) and where your "firmware" actually causes connections.
>=20
> A PAL16R8 is similar but adds flipflops at the outputs.
>=20
> A GAL16V8 replaces the flipflops and OR gates with a logic block
> that can do either one, plus some other things.
>=20
> A CPLD just keeps adding bits (internal registers and paths,
> additional gates that are programmable, etc), and so on...
>=20
> FPGAs are ... actually I'm not too familiar with how FPGAs are
> different.  Presumably you start replicating PLD functions with
> programmable interconnects, making it basically similar (except
> the use of LUTs allows arbitrary logic functions of N inputs
> rather than the more limited OR of ANDs, and so on.

FPGAs actually simplify things on the hardware side (depending how you
look at things of course).

The simplest FPGAs tend to be arrays of "slices" (the term differs
depending on vendor). Each slice usually contains one LUT (the number of
inputs that LUT has depends on the FPGA) and a Flop/latch. That's pretty
much it.

Each slice is connected to a ton of interconnect that allows it to
connect to a bunch of other LUTs and IO pads.

Pretty much all FPGAs have dedicated clock hardware, consisting of fast
paths to the LUT flops and IO pads, and other clock related stuff like
DLLs/PLLs, clock dividers, muxs, clock gaters (although modern tools
will avoid clock gating and instead use flops with enables, gating a
clock in an FPGA is generally bad unless you really know what you're
getting in to), etc.

As FPGAs get more complex they start adding blocks. Modern FPGAs have
SRAM (both as self contained blocks and also distributed in slices), DSP
blocks (for doing math), CPU cores, etc.

On top of that though you have all the hardware related to configuring
the FPGA, usually meaning as a minimum a JTAG chain and configuration
SRAM. Most parts have faster interfaces for configuration (for
connecting to PROMs).

TTYL

--=20
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