On Thu, May 5, 2011 at 3:53 PM, V G wrote: > > Conceptually, I know how transistors are used to make logic gates, and > how those gates can be packaged into an IC. But an FPGA is so much > more complicated than that and is being routed dynamically. The > biggest problem for me is understanding how the compiler treats > different keywords like reg and wire and what they translate to > physically. I can look at static gates and see what they do, that's > not the problem. What about sequential logic, eg, those flip-flops, etc? What about the other way around, understand the physical part and then see how they translate to Verilog by the compiler? --=20 Xiaofan --=20 http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist .