On 21/04/2011 08:21, V G wrote:
> I totally understand that this is not a CPU. I already started doing Veri=
log
> now. Got some neat stuff running on the board, that I've written myself. =
It
> would be counterproductive to switch to VHDL now.

You only think that. A week of VHDL would really help your verilog.

I found this the case.

I also found that learning different programming languages makes my C=20
programming better.

Some like Occam, Oberon, Lisp, Ada, Prolog I have done very little.
Others like Pascal, Modula-2, C++, Java and C#  I have done lots
--=20
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