On 17/04/2011 16:08, V G wrote: > Hey all, > > I know this has been asked multiple times before, and I did do some > research, but want to know YOUR opinion on this. > > Which one should I start learning? Verilog or VHDL? Also, what's up with > this SystemVerilog superset? If you know any C, do VHDL first so that you do not fool yourself. Then do Verilog. Absolutely do all the basic tutorials. Unlike C, Ada etc, which they superficially resemble, you are not=20 writing a program that's compiled and run during operation. You are=20 defining a system, you can even view a schematic made of logic gates=20 that your design can be represented by. Doing any arithmetic may causes your design to include adders or=20 multipliers. --=20 http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist .