On 08/03/2011 22:39, Olin Lathrop wrote:
> I haven't used the UART on a PIC 32 yet, so this is going by how the UART=
s
> work on other PICs and common sense.  TXIF, on other UARTs at least, tell=
s
> you the UART is ready for the firmware to write another byte to it.  When
> there is nothing to send, TXIF is always set.  If you want to use interru=
pt
> driven UART output, then you need to disable the TX interrupt (clear TXIE=
)
> when there is no more data in the output FIFO.
>
> The interrupt condition is that the UART is ready for another byte.  You
> can't clear this condition by clearing the flag.  On other UARTs at least=
,
> TXIF isn't writeable.

I seem to recall it being pretty similar on PIC32 - I just checked in=20
the Family Reference Manual and the default behaviour (UTXISEL<1:0> =3D 00=
=20
- see below) is to set flag when space is available, although the flag=20
is writeable (you are instructed to clear the flag)
It mentions three options for when the interrupt should be generated,=20
set by control bits. It seems pretty clear as it is written:

21.5.2 Transmit Interrupt
The transmit interrupt flag (UxTXIF) is located in the corresponding=20
interrupt flag status (IFS)
register. The UTXISEL0 control bit (UxSTA<15:14>) determines when the=20
UART will generate a
transmit interrupt.
1. UTXISEL0<1:0> =3D 00, the UxTXIF is set when a character is transferred=
=20
from the transmit
buffer to the Transmit Shift register (UxTSR). This implies at least one=20
location is empty in
the transmit buffer.
2. UTXISEL0<1:0> =3D 01, the UxTXIF is set when the last character is=20
shifted out of the Trans-
mit Shift register (UxTSR). This implies that all the transmit=20
operations are completed.
3. UTXISEL0<1:0> =3D 10, the UxTXIF is set when the character is=20
transferred to the Transmit
Shift register (UxTSR) and the transmit buffer is empty.
The UxTXIF bit is set when the module is first enabled. The user should=20
clear the UxTXIF bit in
the ISR.
Switching between the two Interrupt modes during operation is possible.
Note: When the UTXEN bit is set, the UxTXIF flag bit is also set if=20
UTXISEL0<1:0> =3D 00
(since the transmit buffer is not yet full, i.e.,transmit data can move=20
to the
UxTXREG register).

--=20
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