On 06/03/2011 18:55, Olin Lathrop wrote:
> N. T. wrote:
>> >  At<22 nm process and mass production, it, probably, would be cheaper
>> >  to load-on-demand software CPU / peripherals into FPGAs  than to
>> >  manufacture standard CPUs/MCUs.
> No, that's just silly.  If this were true, then people would be doing it =
and
> PICs wouldn't exist.  Do you really think you're the first one to ever ha=
ve
> thought of this?
>
> Implementing logic such as a processor in soft gates is going to take mor=
e
> silicon than doing the same thing explicitly.  That means a dedicated mic=
ro
> is going to cost less than the same thing implemented in a FPGA.  There w=
ill
> always be high volume applications where the cost difference matters.  Th=
at
> will guarantee the existance of dedicated micros, which in turn makes the=
m
> available to less cost sensitive applications.
>
> Large FPGAs do have soft CPU cores available.  Soft cores are good when y=
ou
> need a FPGA anyway, and you can use the tightly coupled and slower genera=
l
> purpose logic of a processor for higher level control or whatever.
> Dedicated micros and soft CPU cores are two different things.  One is not
> going to obsolete the other any time soon.
Soft core lets you expensively try ideas for CPU or integrate CPU.  They=20
are not economic for production nor do they give best performance.
They do have their place in FPGA based design.
There is a Java Machine Softcore. Executes Java byte code, also 6502,=20
Z80 and ARM Cortex M1 as well as a few FPGA only CPU RISC cores designed=20
for optimal least usage of FPGA resource etc. .

But hard CPU core is always faster and less silicon.

********************************
You can now have your cake and eat it.
********************************


Dual real ARM Cortex A9 cores and FPGA on one chip

http://www.xilinx.com/technology/roadmap/processing-platform.htm

The portfolio comprises four devices, each integrating a complete ARM=20
Cortex-A9 MPCore-processor-based system with 28,000 to 235,000 cells of=20
28-nm, low-power programmable logic, the equivalent of 430,000 to 3.5=20
million ASIC gates.

Each Zynq-7000 EPP device embeds a dual 800-MHz ARM Cortex-A9 MPCore=20
with a dedicated Neon coprocessor for media and signal processing that=20
adds instructions for audio, video, 3-D graphics, and image and speech=20
processing, along with a double-precision FPU (floating-point unit). The=20
hard-wired processing system includes L1 and L2 caches, memory=20
controllers, and commonly used peripherals. The devices integrate dual=20
12-bit ADCs that support sampling rates as high as 1M sample/sec on as=20
many as 17 external-input analog channels.

The two largest devices in the Zynq family, the Zynq-7030 and Zynq-7040,=20
have built-in multigigabit transceivers that operate as fast as 10.3125=20
Gbps and dedicated DSP resources that deliver 480 and 912 (billion=20
multiply/accumulate) operations of peak performance, respectively. The=20
two smaller devices, the Zynq-7010 and Zynq-7020 devices provide as much=20
as 58 and 158 GMAC operations of peak DSP performance, respectively.

Customers can start evaluating the Zynq-7000 family by joining the=20
Xilinx Early Access program, which Xilinx has limited to 100=20
participants. The company plans to release its first silicon devices for=20
the second half of 2011, and engineering samples should become available=20
in the first half of 2012. Prices vary, depending upon volume and=20
device. The 7000 family will have an entry point of less than $15 (high=20
volumes). A design kit will be available for $495.

http://www.edn.com/article/517141-Xilinx_integrates_dual_ARM_Cortex_A9_MPCo=
re_with_28_nm_low_power_programmable_logic.php

--=20
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