I'm very inexpert at FPGA and not yet completed any serious project...


On 05/03/2011 07:36, V G wrote:
> I've been reading the wikipedia pages, as well as some other websites on =
the
> topic of PAL/CPLD/FPGA, but I still don't understand the following:
>
> 1. What are they?
Programmable Logic. Instead of separate standard logic parts (much more=20
space and expense) or a Program on a Microcontroller (much much slower).
> 2. How do they work?
Invented by some guys fed up designing Z80 (and probably especially=20
Z8000 which was a disaster). Originally The idea of having groups of=20
standard NAND gates, NOR gates and X / Y wiring matrix of fuses to=20
"blow" to create your logic function,

Modern gates have reprogrammable interconnections.
Complexity
PAL -> CPLD -> FPGA
At lower end they really are gates. At high end (all FPGAs) the logic is=20
implemented by RAM look up table and often the configuration must be=20
loaded at boot time from External FLash. some have Flash built in. Also=20
on better parts are Bus drivers, Hardware multiply & Add (basic for CPUs=20
and DSPs and wasteful to do from scratch).
> 3. Why are they used?
To shrink several large circuit boards to one chip (save money & space)
Avoid ASIC in a prototype or "proof of concept" or if production is =20
less than 500k
Allow changes in field via JTAG or companion CPU
> 4. How are they used?
You use CAE tools and can design via logic table, HDL, verilog, DSP=20
coeffients or schematic in any combination.

> 5. I've seen the term "parallel processing" mentioned a lot. How does thi=
s
> tie in with PAL/CPLD/FPGA?
The design can use any mix of parallel, pipelined and serial=20
configuration up to limit of "gates".
if you have 16 hardware Multipliers and the design needs 128 multiplies,=20
the CAE can pipeline the 16 serialised (multiplexed) as 128 (a CPU can=20
do many millions of multiplies in a function call with one Multiplier).=20
Or the data can have 8 to 32 parallel paths instead of one pipeline. If=20
the real number Multipliers is less than design needs, your clock rate=20
is slower, thus 128 parallel data paths with only 16 multipliers means=20
only 16 multiplications at once, So it multiplex had no overhead the max=20
clock rate would be 8 times slower.

> 6. What is the difference between PAL, CPLD, and FPGA and under what
> circumstances would you use each of them in?
Complexity, speed, cost see above.
A simple PAL can maybe replace a handful of 74 series chips. The highest=20
end FPGA can implement ethernet, USB, IDE, VGA port all with very little=20
external hardware and implement an entire PC motherboard in one FPGA,=20
with multiple "soft" RISC CPU (likely no FPU) "cores". Many CPU are=20
available as libraries. 6502, Z80 etc can be faster than original. MIPs,=20
ARM faster or slower.
Latest Xilinx FPGA has 2 x ARM hardware cores and FPGA on one chip.
Low end parts do MHz clock. Highest end parts maybe 20Gbps per pin=20
trhoughput.

> 7. Why not use a microcontroller such a PIC to do the work?
yes. if an overall speed of 10kHz (some DSP) to 1MHz total average=20
throughput is OK. 12MIPs on 18F. And 4 to 50 pins
any PAL / CPLD / FPGA can beat that. A $15 Spartan FPGA may manage=20
several MHz data rate with more DSP than the 18F can manage at 10kHz. Or=20
do simpler stuff up to 400MHz. Also with 100s of pins of I/O simultaneously=
..
many Programmable Logic have extremely high and usable I/O, so those are=20
BGA (Ball Grid Array)

Some things are easier to write a program for, other things are more=20
easy and reliably designed in Logic.
The "programming" lanaguages (two main ones) are not sequential=20
functional languages that generate a program that is executed. They are=20
mostly parallel descriptions of the configuration. Write "regular" style=20
stuff and see 3 lines eat the entire chip!

> 8. How does each one of them compare to a microcontroller, let's say PIC3=
2,
> in terms of cost, processing power, complexity, etc?
FPGA "faster" than PC32 with more I/O could be $5. A high end FPGA to=20
prototype GHz speed ASIC part with CPU core and much DSP many $k

> 9. Are simple development boards for them expensive? I'm interested in
> messing around with them. How is programming done?
>
No.
http://www.techtir.ie/node/1003026
Well supported with Tutorials and plenty of features
http://www.trenz-electronic.de/products/fpga-boards/trenz-electronic/te0300=
-spartan-3e-series.html
very low on FPGA performance scale. Actual chip is very cheap.

List
http://www.techtir.ie/node/1001701

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