On Fri, 04 Mar 2011 12:36:06 -0700, you wrote: >Good day to all. > >I'm tackling another project where I need to intercept a SPI data=20 >stream and modify the data on the fly. I'm only interested in=20 >modifying the data feeding a pair of 74hc595 shift registers but the=20 >SPI buss is used for talking to lots of different devices. There is=20 >a separate Latch line that latches the data into the two shift=20 >registers at the appropriate time. > >So: I have to continually buffer two bytes worth of data until the=20 >Latch line becomes asserted. I'll then modify the data and spit it=20 >out to the shift registers. > >I haven't even put a scope on this beast yet to see how fast the SPI=20 >data is but I suspect that its pretty quick - there are a lot of=20 >devices on the buss that are updated in real time. > >Although my first thought was to use a PIC that can do hardware SPI=20 >slave, I'm not sure if its fast enough. I'll find out later today=20 >when I put a scope on the SPI buss. > >Assuming that the PIC isn't fast enough, my next thought was to use a=20 >small CPLD. Therein lies my problem. > >All of my CPLD experience is with old Intel / Altera parts: ep320,=20 >ep610, ep910, epm7032, epm7128. The last of those projects was=20 >around 15 years ago and written in Altera's Advance Design File or=20 >Text Design File formats (.ADF, .TDF). I have no experience with=20 >Verilog or VHDL. > >That's the software side. The hardware side is also a little=20 >challenging: the SPI buss and those shift registers are running from=20 >5Vdc. Most modern CPLD's seem to be 3.3V or lower. > >So: I'm looking for suggestions for a small to medium size CPLD that=20 >runs at 5V and has at least 40 macrocells. I can probably get away=20 >with fewer macrocells (as few as 24) if I generate the output data on=20 >the fly (rather than loading a 16-stage shift register and shifting=20 >the data out) but I'd have to see how flexible the product term array=20 >is for that kind of thing. > >I'd appreciate any suggestions or opinions that others might have. > >Many thanks! > >dwayne > >--=20 >Dwayne Reid >Trinity Electronics Systems Ltd Edmonton, AB, CANADA >(780) 489-3199 voice (780) 487-6397 fax >www.trinity-electronics.com >Custom Electronics Design and Manufacturing Couple of suggestions - SPI isn't exactly a lot of lines so may be cheaper to level-convert to 3.3 = & back & use a cheap modern CPLD I think Atmel's ATF PLDs are still available - these were programmed in CUP= L (Free from Atmel) which may be more familiar with what you were using in teh past.=20 Many of the NXP ARMs have two SPI ports, which may be fast enough. You may = even to be able to do bit manipulation on the fly bit-by-bit.=20 --=20 http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist .