On 04/03/11 19:36, Dwayne Reid wrote: > That's the software side. The hardware side is also a little > challenging: the SPI buss and those shift registers are running from > 5Vdc. Most modern CPLD's seem to be 3.3V or lower. > > So: I'm looking for suggestions for a small to medium size CPLD that > runs at 5V and has at least 40 macrocells. The Xilinx XC9500 series was still in production last time I checked,=20 but very expensive. You'd be better off getting a couple of 74LVC or 74LVX chips to use as=20 bus translators, and use an XC9500XL series chip (3.3V). Far cheaper,=20 and far easier to obtain parts... Heck, the I/O pads are 5V tolerant -- if your hardware doesn't mind=20 being driven from 0V/3.3V TTL, you can do away with the buffers and wire=20 the CPLD straight in. Only thing you'd need to add is a low-current 3.3V power supply. An LDO=20 would be the ideal, something like an LP5951MF-3.3 (NatSemi) or ZXCL330=20 (Zetex / Diodes Inc). One chip (30p ish) and two cheap ceramic=20 capacitors is all you need. --=20 Phil. piclist@philpem.me.uk http://www.philpem.me.uk/ --=20 http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist .