> Yes, "strong" pull-up as in PIC's output FET R-on driving RA0. I would
> set PORTAbits.RA0 to 1 before setting TRISAbits.RA0 to 0, otherwise
> you would probably see a momentary glitch on RA0 and that would upset
> your DS1820.
>

To correct myself, on an 18F part, use LATA (the latch), to change the
output state, not PORTA, and then set TRISA.
--=20
http://www.piclist.com PIC/SX FAQ & list archive
View/change your membership options at
http://mailman.mit.edu/mailman/listinfo/piclist
.