Bob Axtell <engineer <at> cotse.net> writes:=20
> I spend several weeks on this, finally pinning the problem on our Blessed
> Microchip (sigh).
.... snip
> This method, that I call "Best of 5", always works for me.
>=20
> Otherwise, drop the internal PIC EEPROM and use an external EEPROM, which
> does not have super small cells.

Bob, thanks for sharing that. This is majority voting essentially, no?.
Have you considered using 2 of 3 voting instead? Have you seen any
patterns in the faults that were fixed? I mean set up some kind of
logging method so you could analyze faults later? Do faults affect
adjacent cells in the sense of cache line or block adjacent or simply
adjacent as in consecutive addresses?

Also did you try to spread the joined cell groups of 5, so cells in a
group were not adjacent or did you leave them adjacent? If you did,
did it make any difference?

External EEPROMs also fail in long term use, frequently as a side
effect of ESD elsewhere in the circuit. Also many EEPROMs of 'new'
vintage which are very cheap have also undergone die shrinks. I do
not know how to tell them apart, I think that the only way is to=20
measure actual write time required or power consumption under the
same circumstances, lower time or current drain may indicate a
die shrink.

To the O.P.: Peter, did you see a pattern in the failed devices?
Like datecodes, or use in a certain electrical environment (f.ex.
in combination with other equipment which can cause RFI or pulse
injection), or use in high heat/humidity? Perhaps use in some new
environment like RF toll gates, or back-scattering X-ray portals
used at border crossings or such?

I once saw an interesting pattern of ESD related failures in a
product (not mine) which occurred in the dead of Winter. The pro-
duct was a consumer product and used indoors. CMOS devices were
damaged and sometimes microprocessors zapped. We searched a lot
at the time, as a service provider, for a fault. The only thing
we could correlate with, and that was years later, was humidity.
Winter caused humidity under 30% when the bulk of the faults
occurred. This causes much stronger static discharges as higher
voltages can build up and not bleed down naturally. The manu-
facturer discontinued that product but we could later see that=20
the ESD prevention measures at board edges and in other areas
that mattered were much better done in later products, which=20
also did not fail in that way anymore. The entry point for ESD
may have been an unshielded modular IR receiver near the board
edge and near some user accessible keys. All later models used
shielded IR receiver modules.

-- Peter (another)


--=20
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