You do not need to connect all gnd and power lines, just mark them as Vss /
Vin so at least these lines do not need to cross the others. Eagle will kno=
w
they belongs to the same node. As a general rule what I try to do usually i=
s
to keep ground down, power line up, input to the left and output to the
right -- if possible. For me that makes it easier to see what it does.

BTW: For the ceramic capacitors you probably would need a non-polarized
drawings so that you can see that the capacitor is a non-polarized one, plu=
s
usually you will see which one is a buffer and which is a decoupler for
example.

Also usually that symbol you were using for V_BAT and V_OUT is used for
signals as opposed to terminals (if that was the intention then it is ok).

Tamas



On Thu, Jan 13, 2011 at 11:30 AM, V G <x.solarwind.x@gmail.com> wrote:

> I'm not very "neat" when it comes to drawing schematics. What do you guys
> think of this one? Any tips?
>
> Schematic: http://img842.imageshack.us/img842/750/capturekaa.png
> --
> http://www.piclist.com PIC/SX FAQ & list archive
> View/change your membership options at
> http://mailman.mit.edu/mailman/listinfo/piclist
>



--=20
int main() { char *a,*s,*q; printf(s=3D"int main() { char *a,*s,*q;
printf(s=3D%s%s%s, q=3D%s%s%s%s,s,q,q,a=3D%s%s%s%s,q,q,q,a,a,q); }",
q=3D"\"",s,q,q,a=3D"\\",q,q,q,a,a,q); }
--=20
http://www.piclist.com PIC/SX FAQ & list archive
View/change your membership options at
http://mailman.mit.edu/mailman/listinfo/piclist
.