On Sat, Jan 8, 2011 at 3:49 AM, Sean Breheny wrote: > Interesting...I wish they had said which FPGA they used. I'm used to > working with smaller ones (equivalent to maybe 100k gates) where even > a single simple microcontroller "core" would take up something like > 1/4 of the FPGA. > > I did do one cool learning exercise, though, where I made a (if I > recall correctly) 24 bit by 16 bit integer divide unit which could > give the result in a single clock cycle of up to 80MHz. It took up > half the chip, though :) > > Sean > > They likely used something like this: http://www.dinigroup.com/ It doesn't seem logical to fit any meaningfully useful number of soft-cores on a single FPGA. Unless they have some wafer-scale part.. unlikely. --=20 Martin K. --=20 http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist .