Right then... I've scanned the current schematic for the Teletext Data Separator from=20 my lab notebook. Here it is in all its scribbly, hand-drawn,=20 chickenscratched glory: http://www.philpem.me.uk/temp/ttxpll.pdf And the ETSI Teletext Specification is here: http://www.etsi.org/deliver/etsi_i_ets/300700_300799/300706/01_60/ets_30070= 6e01p.pdf (FYI: only pages 14 through about 20 are of any interest to this=20 discussion) For reference, here's what I want to do: - I want to take a Teletext-format NRZ data stream and extract the=20 clock, so I can then extract the data stream - This is to archive Teletext pages before the digital switch-over.=20 "Archival for posterity". That and it seemed like a fun project (until I=20 started designing the PLL!) - Data rate is 6.9375MHz, plus or minus 25ppm. - Data packets are 45 bytes long: - 3 byte preamble (01010101 01010101 11100100) - even parity - 2-byte address (Hamming coded, odd parity) - 40 bytes of data (odd parity) - The PLL needs to lock by the end of the second preamble byte, ready=20 to receive the framing byte (11100100). - I've scrapped the 74HCT4046 PLL I was using, in favour of a Hogge=20 phase detector and VCXO. - My VCXO is based on a 74HCT04 and uses a varactor for tuning. - The VCXO's frequency ranges from 6.93738MHz (0V across varactor) to=20 6.93758MHz (5V across varactor). Somewhat asymmetrical, but close to=20 what's required (6.9375MHz at 2.5V is the ideal). The range on this may=20 be a little narrow -- 25ppm is 6.937327MHz to 6.937673MHz. The problem at the moment is that while the output data and clock are=20 valid (or *look* valid on the scope), the PLL doesn't seem to be=20 locking. The voltage at "VCO Vin" seems to rise and fall in a sawtooth=20 (and a VERY slow one at that) but there doesn't seem to be a point where=20 VCO_Vin stays at one particular value. My theories at the moment are: - The circuit is built on breadboard. Stray track-to-track=20 capacitance is screwing up the loop filter, VCO or both. - The VCO range just plain isn't wide enough. Thus, the loop keeps=20 searching, but never hits the right phase/frequency. - There isn't enough current going into the varactor to make the=20 frequency change significantly. This seems plausible -- I tested the=20 VCXO by wiring it up to a lab power supply and varying the output voltage. - The loop filter just plain isn't right. Can anyone offer any insight or assistance? Thanks, --=20 Phil. piclist@philpem.me.uk http://www.philpem.me.uk/ --=20 http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist .