Try clearing all 4 (FRS0L, FRS0H, FRS1L, FRS1H) in the initialization,=20
and see if that changes anything.

Kerry


David Duffy (AVD) wrote:
> I clear FSR0H in the initialisation and set FSR0L just before I read /=20
> write the data.
>
> On 27/11/2010 9:43 AM, Kerry Wentworth wrote:
>  =20
>> When do you set FSR0L and FRS0H to point to the buffer, when you go to
>> read the buffer, or at the beginning of the code?
>>
>> Kerry
>>
>>
>> David Duffy (AVD) wrote:
>>    =20
>>> I am using INDF0 for reading the receive buffer.  It is the same code
>>> I've used countless times before.
>>>
>>> That still doesn't explain why the hard reset or new chip fixes it thou=
gh.
>>> David...
>>>
>>> Kerry Wentworth wrote:
>>>
>>>      =20
>>>> Is it possible that one of the INDF registers points to that location?
>>>>
>>>> Kerry
>>>>
>>>>
>>>> David Duffy (AVD) wrote:
>>>>
>>>>
>>>>        =20
>>>>> OK, I have added a debugging output via the previously unused UART
>>>>> transmit pin. Thanks for the suggestion.
>>>>>
>>>>> What I've found is one byte of the receive buffer (in bank 1) is bein=
g
>>>>> corrupted. (from 0x3f to 0x04 or 0x24) I have checked and there no
>>>>> register in another bank (at the same location) that is being accesse=
d.
>>>>>
>>>>> Why the reset makes any difference is not clear yet. I'm still on the
>>>>> trail though.
>>>>>          =20
>
>  =20



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