I clear FSR0H in the initialisation and set FSR0L just before I read /=20
write the data.

On 27/11/2010 9:43 AM, Kerry Wentworth wrote:
> When do you set FSR0L and FRS0H to point to the buffer, when you go to
> read the buffer, or at the beginning of the code?
>
> Kerry
>
>
> David Duffy (AVD) wrote:
>> I am using INDF0 for reading the receive buffer.  It is the same code
>> I've used countless times before.
>>
>> That still doesn't explain why the hard reset or new chip fixes it thoug=
h.
>> David...
>>
>> Kerry Wentworth wrote:
>>
>>> Is it possible that one of the INDF registers points to that location?
>>>
>>> Kerry
>>>
>>>
>>> David Duffy (AVD) wrote:
>>>
>>>
>>>> OK, I have added a debugging output via the previously unused UART
>>>> transmit pin. Thanks for the suggestion.
>>>>
>>>> What I've found is one byte of the receive buffer (in bank 1) is being
>>>> corrupted. (from 0x3f to 0x04 or 0x24) I have checked and there no
>>>> register in another bank (at the same location) that is being accessed=
..
>>>>
>>>> Why the reset makes any difference is not clear yet. I'm still on the
>>>> trail though.

--=20
___________________________________________
David Duffy        Audio Visual Devices P/L
Unit 8, 10 Hook St, Capalaba 4157 Australia
Ph: +61 7 38235717      Fax: +61 7 38234717
Our Web Site: www.audiovisualdevices.com.au
___________________________________________

--=20
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