David wrote: > PDF: http://tinyurl.com/36xp3u2 That's a lot better although still sloppy in various places. Many of the labels are rotated making them difficult to read. A good example is T1, th= e IRLML6402. Neatness counts. The level of care you take in your schematic (and most everything else for that matter) says a lot about you. For most common parts I have two or more versions of them in the library, one for each of the common rotations. For example, I have both vertical an= d horizontal resistors premade. That way you don't end up with a mess like your R5, R4, etc. If you don't have a pre-rotated part, then you have to "smash" the part and rotate and position the text manually. That's part of the job, especially when you ask others to look at your schematic. Inductors are drawn as coils, not as solid filled rectangle. Pay attention to details. > Eagle: http://tinyurl.com/2vrj2e6 (ZIP) Yikes, you've got silkscreen overlapping pads all over the place! Most board houses will clip the silkscreen off of pad areas, but they may hold u= p the job while they ask you. Either way they'll think you're a moron, which may matter depending on how automated or not their process is. Production techs are people too, and can develop attitudes. You don't want to invite them to make you their victim. This is a two layer board with the bottom layer only sparsely used. You'd be better off making it as much of a ground plane as you can instead of trying to fill in the top layer as you did. All the islands in the top layer will prevent it being a effective ground plane anyway. You apparently didn't use net classes at all, since everything is in the default class and its width and other values were never set. I looked around the board a bit more and found that some of your 0805 resistors like R1 have a border around them in the copper layer! WTF? Since you're obviously very new to Eagle, you should at least look around a bit at how those that know what they're doing make library parts. You also clearly didn't run a DRC check, which would have found a number of clearanc= e violations. You do need to get used to making your own parts and definitel= y not rely on the Cadsoft libraries, but you have to learn how to do it right first. Several of my libraries are available in my Eagle Tools release at http://www.embedinc.com/pic/dload.htm. The pins at the top right side of IC1 have lines coming out from them, but aren't labeled. There is no indication in the schematic that they are connected to anything. Some of the names start with "^" apparently in a errant attempt to show inverted logic. Didn't you read the manual at all? This is done in Eagle by preceeding a signal name with "!". I fixed one of them to illustrate. The bypass cap for IC1 is poorly placed. As a challenge and to demonstrate some of the things I am talking about, I edited your board and schematic. The route was a mess, so I ripped it all up. Somewhere in this process I did something wrong or Eagle got confused about the GND net connections. Even though I deleted the GND polygon from the top layer, it still thought everything on the GND net was connected and showed no airwires. I got around it by deleting all your GND connections and recreating them using my own GND1 ground symbols. After that Eagle understood the connections again and showed the proper airwires. As far as I can tell, your GND connections were done correctly and I don't know why Eagle had this problem. I created a ground polygon on the *bottom* layer, and then rerouted the board. I also replaced your 0805 resistor with my own package since yours had that bizarre copper ring around them. Note the more readable orientation of the text. I didn't have to do anything special as I have separate parts for vertical and horizontal resistors. I also fixed the tex= t of T1 as a example. The oblong holes for the connector pads were just silly. They added nothin= g electrically but used up valuable space by the edge of the board that prevented routing there. I replaced them with smaller pads. I may not hav= e put them all back in the right place. Unless these need to be in those specific places due to external constraints, some of them could be moved around to make routing easier. I then manually routed all the GND1 SMD pads each with their own via to the bottom (ground) polygon. That leaves as much routing flexibility for the remaining signals as possible. I routed a few obvious connection and place= s where I thought the auto router might paint itself into a corner, then auto routed the rest. You can see the result at http://www.embedinc.com/temp/david.zip. The auto route isn't all that bad, but there are some obvious cleanups to minimize the impact on the ground polygon. I didn't do any of that, so you can see how the auto router left things. --=20 http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist .