>> I am surprised by the blowing of the chip on 12V applied to MCLR > You shouldn't be. =A0This is very clearly spelled out in the datasheet ri= ght > where you'd look for it. =A0The third line down under Absolute Maximum Ra= tings > specifies -300mV to 6V as the range. =A0Since 12V > 6V, there should be n= o > surprise that it goes poof at 12V. > Or if I got this wrong I apologize, but then please do show us a copy of > your personal exemption certificate for being allowed to violate the laws= of > physics. An interesting perspective. I believe you'll find that the glass is half full. I'm not sure why you'd think that being surprised when something dies AND not expecting to be able to violate the data sheet spec with impunity are mutually incompatible. Using a more familiar topic as an example.: Many processors specifiy maximum signal excursion on input pins to be not more than 0.2V or 0.3V outside power supply rails. Some processors specify 0V tolerance. On a 0V tolerance part I'd be surprised if an excursion of up to say 0.2V outside the power rails would cause damage or mis-operation. BUT, if it did I'd know that I had no comeback, and I'd seek to design related circuitry so that the 0V tolerance was met. I'd guess that the reason for the <0.2 or < 0.3 Volt specification was due to these voltages being << the forward voltage of the protection diodes. I'd assume that the IC was designed and built as above, and be surprised if it wasn't, but know that if my assumptions were wrong I'd have no 'comeback'. Russell --=20 http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist .