OK. Fine it was sorted out.

There was a lot of post on this thread pointing in
all different directions... :-)

Not also that that the fact that there are now 32
RAM-banks instead of 4 is more or less a non-issue.

Setting a bank is now only *one* command (instead of
two BCF/BSF commands in the old 4-bank models) and is
thus faster then on the old architecture.

The most freq used registers (the 12 first SFR's) are
mapped over all 32 banks and need no bank-setting at all.

All *banked* GPR (80 bytes from each bank) are combined into
the "linear data memory" where it is addresses as a continous
memory area. Note that the 16 byte "non-banked GPR" is not
included in this area. The FSR registers automaticly increments
over all of this area.

In some respects, the PIC16F1xxx is actualy closer to the
PIC18 architecture then to the old PIC16... :-)

Jan-Erik.





On 2010-09-22 12:37, David Duffy (AVD) wrote:
> Jan-Erik Soderholm wrote:
>> On 2010-09-22 09:06, David Duffy (AVD) wrote:
>>> So to be clarify, I don't understand why Microchip are setting LATx
>>> *and* PORTx during initialisation in their example.  Setting PORTx seem=
s
>>> to be totally redundant in devices that have LATx registers.
>>>
>>
>> Yes, that is redundant.
>>
>> B.t.w, *which* datasheet is this ?
>> I'd like to verify the context this was written in.
>>
>
> PIC16F1934 - document DS41364D
>
>> When *writing*, PORTx and LATx are setting the same
>> internal registers in the PIC (the "output latch").
>> So when writing (CLRF, MOVWF...) it doesn't matter if
>> you use LATx or PORTx, the effect is exactly the same,
>> the data is written in the "output latch".
>>
>
> That's why I thought it odd that Microchip clear both (effectively the
> same) in their example.  It wouldn't be the first time their examples
> were not the best.
>
>> Note that *ALL* PIC has "output latches", they are just not
>> directly readable on some PICs (those without LATx registers).
>> If not, there wouldn't be anyplace for the PIC to "remember"
>> the value written to the PORT, right ?
>>
>
> Well yes, I was making the distinction that the LATx was a register in
> the sense that is was accessible.
>
>> It's very much the same as the fact that on some (older)
>> PICs the "working register" ("W") is not mapped as a
>> "file register". On PIC18 and the newer PIC16F1xxx there
>> is a mapped "WREG" SFR register that can be used for
>> BCF/BSF/RRF/RLF or similar instructions that are otherwise
>> not usable directly against "W".
>>
>
> Ooh, I hadn't noticed that yet.  There's been a few times I wished I
> could rotate operate on W directly.
> David...
>
--=20
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