On Sep 14, 2010, at 1:10 PM, James Newton wrote:

> In at least one case, the I2C interface had to be bit banged

I don't think that anyone has pointed out yet that few "bit-banged" =20
protocols actually rely on counting instruction cycles to get accurate =20
timing any more, and that this becomes increasingly true as cpu clock =20
rates go up and get less deterministic.  Most bit-banged code ends up =20
looking like:
    set_bit x,y
    delay_us(midsized_number);
    set_but x,z
    delay_us(midsized_number);
Sometimes the midsized number is big enough that timer isrs can be =20
used for the delays, and other times they are "as fast as possible", =20
but in either case the code will work equally well in C...

IIRC, the SX/Ubicom chips were very big on being able to service a =20
timer interrupt fast enough to use for quite-speed serial protocols...

BillW

--=20
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