> Em 11/9/2010 22:36, Forrest W Christian escreveu: >> I am building a test apparatus (ok, it's a cable mapper) which will >> require around 256 bits of I/O on a pic system. Maybe even more. >> > > If you don't need the pins to be bi-directional you could use the > 74HC595 (output only) and 74HC597 (input only). They work serially and > can be daisy-chained, you would save all the chip-selects. > > Isaac A difference between SPI and shift registers is that the output of a shift register changes state shortly (ns) after the same clock edge that causes the input to sample the input data. SPI samples on one edge and changes state on another edge. With long shift registers, clock alignment can get tricky. I just looked at a schematic I did back in 2004. I was using 14 74vhc164 shift registers to run a LOT of LEDs. This serial in parallel out shift register does not have output latches, so the LEDs would flicker as they were changed, which was acceptable in this application. Anyway, I ended up using a 74vhc14 to generate five buffered versions of the clock, each driving up to three shift registers. I agree, though, that cascading SPI devices can save you a lot of chip select lines. It does slow things down, since you have to update everything when only one thing changes. But in that 2004 application, everything would change at once (multicolored LEDs indicated where to put your fingers on a guitar), so there was no speed loss. I've seen some SPI devices that can be cascaded. These are generally input only devices (write but no read, so MISO is not used). Good luck! Harold --=20 FCC Rules Updated Daily at http://www.hallikainen.com - Advertising opportunities available! --=20 http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist .