Hmm, I just did the unlock stuff and PPS on an 18F and it's a little=20 similar, although I am not familiar with the 33F instruction set (I mostly= =20 use C nowadays) The only thing I can see is that it says to write the unlock code to OSCCON= =20 in the manual, but you write it to OSCCONL (unless I have missed something) Also if you are using the SPI in master mode, why are you setting the slave= =20 select enable bit? (SSEN) -------------------------------------------------- From: "ivp" Sent: Wednesday, September 08, 2010 3:24 AM To: "Microcontroller discussion list - Public." Subject: [PIC] dsPIC33F, remapping and SPI > Chaps, > > I have a dsPIC33FJ64GP802 application where I need the SPI buss > for an SD card. For whatever reason I can't see SPI activity. Being > so far quite unfamiliar with the dsPIC firmware I don't know whether > I've got something missing in either the remapping or the SPI module > > The intention is have > > /CS on RP8, pin 17 > Din on RP9, pin 18 > Clk on RP10, pin 21 > Dout on RP11, pin 22 > > Below is the relevant code I believed should have accomplish that. The > micro does run. In the loop do_spi, an asterisk flashes at 1Hz on an LCD > > I've referred to the pdfs > > 70216B - Oscillator > 70206C - Ports > 70190C - SPI > 70292C - Datasheet > > and user code at http://www.microchip.com/forums/m521952.aspx > > Any ideas please ? > > Joe > > --------------------------------------- > > config __FOSCSEL,FNOSC_FRC ;internal oscillator, no PLL > config __FWDT,FWDTEN_OFF ;Watchdog Timer off > config __FPOR,FPWRT_PWR1 ;no brown-out reset > config __FGS,GSS_OFF & GWRP_OFF ;no code protect > config __FBS,NO_BOOT_CODE ;no boot code > config __FOSC,IOL1WAY_ON ;one-time IOLOCK disabled > > mov #0b0000000000001100,w0 ;RA2,RA3 (OSC) inputs > mov w0,TRISA > mov #0b0000001000000000,w0 ;all output except RP9 > mov w0,TRISB > > clr LATA > clr LATB > > mov #0b0001111111111111,w0 ;no analogue > mov w0,AD1PCFGL > > mov #0x0000,w0 > mov w0,CMCON ;no comparators > > mov #0b0000010010110010,w0 > ; --- > ; 0 12 internal SPI clock enabled > ; 0 11 SDO1 controlled by module > ; 1 10 16-bit data > ; - 9 input sampling position > ; 0 8 data change on L->H > ; 1 7 SS1 pin used for Slave mode > ; 0 6 idle low, active high > ; 1 5 master mode > ; 1 4 secondary pre-scale 4:1 > ; 0 3 > ; 0 2 > ; 1 1 primary pre-scale 4:1 > ; 0 0 > mov w0,SPI1CON1 > > clr SPI1STAT > bset SPI1STAT,#SPIEN ;SPI1 module enabled > > ;OSCCONL Unlock Sequence > > mov #OSCCONL,w1 > mov #0x46,w2 > mov #0x57,w3 > mov.b w2,[w1] ;write 0x46 to OSCCONL > mov.b w3,[w1] ;write 0x57 to OSCCONL > bclr OSCCON,#IOLOCK ;unlock remapping > > ;RP9R 00000 reset value, default pin > ;RP8R 01001 RP8 tied to SPI1 Slave Select Output > > mov #0b0000000000001001,w0 > ; ---00000---01001 > mov w0,RPOR4 > > ;SDO1 00111 RP11 tied to SPI1 Data Output > ;SCK1 01000 RP10 tied to SPI1 Clock Output > > mov #0b0000011100001000,w0 > ; ---00111---01000 > mov w0,RPOR5 > > ;SCK1R 11111 reset value, SPI1 Clock Input tied to Vss > ;SDI1R 01001 SPI1 Data Input tied to RP9 > > mov #0b0001111100001001,w0 > mov w0,RPINR20 > > mov #OSCCONL,w1 > mov #0x46,w2 > mov #0x57,w3 > mov.b w2,[w1] ;write 0x0046 > mov.b w3,[w1] ;write 0x0057 > bset OSCCON,#IOLOCK ;lock remapping > > clr_spifl: btsc SPI1STAT,#SPITBF > bra clr_spifl > > do_spi: mov #0x5555,w0 > mov w0,SPI1BUF > lcd_pos #0x0a > displ #'*' > call delaypt5 > lcd_pos #0x0a > displ #0x20 > call delaypt5 > bra do_spi > > * > * > ********** > Quality PIC programmers > http://www.embedinc.com/products/index.htm > --=20 > http://www.piclist.com PIC/SX FAQ & list archive > View/change your membership options at > http://mailman.mit.edu/mailman/listinfo/piclist >=20 --=20 http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist .