On 21/08/2010 16:36, RussellMc wrote:
>>>> If this is the case then maybe the 15K gate, 128 macrocell Actel part =
....
>>> What are the considerations and differences that will make a device
>>> like this acceptable and red tape free when a micro-controller is not?
>> Consider a well defined state machine implemented with an EPROM and a La=
tch.
>> Then consider the same functional specification (with a HW timer
>> interrupt for added amusement) on a 16F in C by someone with little
>> experience of the mysteries of C, 16F/PIC architecture and a naive faith
>> in C libraries and such things as "printf" (abhorred by /Barjne
>> Stroustrup )/
> Or
> :-)
> Consider a PIC 18F solution, designed en toto  by eg O. Lathrop Esq&
> Co and programmed by them in assembler, compared with a
> programmable-hardware solution designed and implemented bya competent
> EE who has no CPLD / FPGA / Verilog / VHDL experience (as is probably
> the case here). Without casting any aspersions whatsoever on Denny's
> abilities in any field that he considers himself competent in, the
> choice seems extremely clear unless there is an extraordinarily
> unusual set of prerequisites. If the programmable hardware solution
> was designed and implemented by someone with vast expertise the best
> solution may well differ.
>
>
>
>                   R
I think we have the same hymn book.

Who is doing the design is often more important than technology.
--=20
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