At 07:00 AM 8/2/2010, Michael Rigby-Jones wrote: >I suppose running in synchronous mode you are going to need at least 8 >clock cycles to get an interrupt, worst case that could be 8 complete >bytes if those bytes happened to be 0xFF. I wonder if you could switch >the pin to an output and toggle it to 'manually' preload the USART with >7 bits prior to sleeping? The bus conflict problem would need to be >fixed (simple resistor would probably suffice) even assuming this is >possible. I don't think that will work - I *think* that the TRIS bit for the TX=20 pin is overridden when the USART peripheral is enabled. But - it=20 doesn't matter. The nature of the incoming serial bit-stream is such=20 that I am guaranteed to see more than enough edges to fill the=20 receive shift-register, and thus generate an interrupt. I mentioned this on the PIClist because I had not previously seen=20 this technique used to wake a PIC from sleep and thought that others=20 might benefit from it. dwayne --=20 Dwayne Reid Trinity Electronics Systems Ltd Edmonton, AB, CANADA (780) 489-3199 voice (780) 487-6397 fax www.trinity-electronics.com Custom Electronics Design and Manufacturing --=20 http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist .