> >> The dsPIC is rated to run at a maximum of 40 MIPS
> >> on 3 V - 3.3 V. Would running it with a 40 MHz crystal oscillator
> >> be safe? As in, would it be reliable to run the dsPIC at it's maximum
> >> rated frequency?

> > The phrases "...with a 40...", and "... at its maximum" rather
> > suggest, it seems to me, the intent to find an acceptable limit,
> > but not exceed it. No?

> First, define "acceptable".

That was my wording.
He did a good job of doing just that by using the words "safe" and
"reliable" - ie he was very responsibly enquiring about what could be
done.

Your answer addresses his question well. Viz:

>  Microchip guarantee that a PIC can be
> run at its maximum rated frequency with no adverse effects on its
> performance

That in fact is what he wanted to know and what we (for whatever
reason) have failed to convey.
ie data sheet specs are said to be bulletproof. Occasionally YBMV.

> As you might realise, 40MIPS is probably not attainable in PIC
> s/w at 40MHz. The dsPIC FRM says "up to" 40MIPS. 20MIPS
> is "up to"

My quick reading is that the IC concerned will do 40 MIPS ons a
straight road at 80 Mhz internal clock - which can be achieved validly
lower frequency internal clock inputs of  1.6 MHz to 40 Mhz. My quick
skim, oldening eyes, strong arm and weakening brain [tm] :-)  may have
missed something.

> Joe

   R
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