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From: "RussellMc" <apptechnz@gmail.com>
Sent: Thursday, July 22, 2010 9:00 AM
To: "Microcontroller discussion list - Public." <piclist@mit.edu>
Subject: Re: [PIC] Running a PIC near it's maximum rated frequency

>> I'm planning to use an external crystal oscillator (not a crystal as a
>> discrete component, but a crystal oscillator IC) for my
>> dsPIC33FJ128GP802. The dsPIC is rated to run at a maximum of 40 MIPS
>> on 3 V - 3.3 V. Would running it with a 40 MHz crystal oscillator be
>> safe? As in, would it be reliable to run the dsPIC at it's maximum
>> rated frequency?
> 
> 40 MHz is apparently much higher than needed but appears valid. needed.
> 
> eg see section 9.1.4 of
> http://ww1.microchip.com/downloads/en/DeviceDoc/70292D.pdf
> 
> 1. With crystal (not what you asked)
> 10 MHz crystal with PLLPRE=0, PLLDIV=ox1E, PLLPOST = 0
> Gives: VCO input = 5 MHz, VCO output = 160 MHZ,  Fosc = 980 MHz.
> MIPS = 40
> QED.

I'm assuming you meant Fosc = 80MHz here?


> 2. Figure 9-22 shows requirements.
> PLLPRE must be 0.8 - 8 MHz.
> 
> Table 30-16 suggests an external clock of <= 40 Mhz in ECPLL mode BUT
> you can use far lower if desired.
> eg as low as 0.8 x 2 = 1.6 Mhz.
> 
> SO
> - 40 MHz EC meets PLL capabilities for 40 MIPS.
> Highest allowed EC is probably 40 MHz.
> Lowest allowed EC is 1.6 MHz.
> 
> E&OE.
> 
> 
> R
> 
> 
>                      Russell
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