> -----Original Message-----
> From: piclist-bounces@mit.edu [mailto:piclist-bounces@mit.edu] On
Behalf
> Of Ravi
> Sent: 09 July 2010 13:46
> To: Microcontroller discussion list - Public.
> Subject: Re: [PIC] Strange behavior of PICmicro I/O pin
> 
> Spehro,
> 
> > You have set the relevant SCL/SDA port bits to 0 and are writing to
the
> > TRIS registers, not the port registers, to control SCL/SDA, right?
> 
> Below is my initialisation code.
> 
> initialise	clrf porta
> 		clrf portc

Spehro is not referring to your initialisation code, but the way in
which you are manipulating the port pins when sending data/clock
signals.  I2C is an open collector bus system; when "bit bashing" an I2C
master interface you set the output data latches low and leave them.
You then set the TRIS bit to 0 to output a low state, and the TRIS bit
to 1 to output a high state (the resistor pulls the pin up to Vdd).

However, the fact that you see this issue with no EEPROM connected makes
me think this is not the problem.  What it does sound suspiciously like
is your PIC does not have its Vss pin(s) grounded properly, and is
instead grounding through one or more of the ESD protection diodes.
This could certainly explain the voltage offset when the pin is low.

Regards

Mike

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