> 1. This is [EE] and no PIC was mentioned by Harold so it may very well
> that its not a PIC that's used.
>

If I quote Harolds first post "We have a 33 ohm series resistor between the 
PIC32
pin and the trace" This is what lead me to believe he is using a Pic32

> 2. 75 MHz clocking capability WAS noted, but it's not necessarily what
> drives the worst case result.
>
> It's clock active edge transition time that matters here. If the clock
> slews in 3.5 ns (which I think somebody mentioned, maybe not) which is
> ABOUT what you get at 75 Mhz with trise = thi = tfall = tlo = 3.5 ns,
> so one clock cycle so fclk = 1/14 ns ~~~= 70 Mhz.
>
> ie if you have a slower clock rate BUT tr & tf are "too high" it
> behaves much as it would at the higher  clock rate.

Yes, which is why I said it may not make too much difference anyway 
(although as Olin points out it enables you to filter more agressively), as 
you can still have very high frequency components depending on the rise 
time. If the rise time is actually 3.5ns, then Fknee is 0.5/3.5E-9 = 
~143Mhz, if I understand it right. But if the clock is really <20Mhz, then 
wouldn't it be possible to increase the rise/fall times quite a bit? 


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