On 27 June 2010 01:12, Oli Glaser wrote: >>This is a digital clock at 75MHz > I'm probably missing something here, but AFAIK, Pic32 can only do SPI up to > around 20MHz. I thought the 75Mhz was the top speed the flash recipients > mentioned could go to, but I haven't seen any mention of the *actual* clock > speed being used. I know this probably makes no difference as regards > problems if the trace is long enough, but I was just wondering. 1. This is [EE] and no PIC was mentioned by Harold so it may very well that its not a PIC that's used. 2. 75 MHz clocking capability WAS noted, but it's not necessarily what drives the worst case result. It's clock active edge transition time that matters here. If the clock slews in 3.5 ns (which I think somebody mentioned, maybe not) which is ABOUT what you get at 75 Mhz with trise = thi = tfall = tlo = 3.5 ns, so one clock cycle so fclk = 1/14 ns ~~~= 70 Mhz. ie if you have a slower clock rate BUT tr & tf are "too high" it behaves much as it would at the higher clock rate. If you want to try VERY hard at 75 Mhz clocking rate you have 13 ns for the whole cycle and you can apportion trise, thi, tfall and tlow to work to best advantage. As you want maximum rise time you set tfall & tlo as short as possible, set thi to the data hold time for the memory and then use what's left over for trise. Pushed to the limits this causes other problems but you probably don't get that asymmetric. eg if tlow was VERY short and tfall was short then you get reflections from tfall intruding into the start of trise. I you are extremely clever [tm] you may be able to get the reflections from the falling clock messing up the rising clock adequately to misclock, but you'd probably have to be extremely enthusiastic for that to happen. eg just for example if you had trise = 9 ns, thi = 2 ns (assumed data hold time in this example), tfall = 1 ns and t low = 1 ns = 13 ns total, then you will be getting falling edge reflections interfering with the start of clock high at the clock source for traces more than about 3 inches / 75mm.* Somewhere about here good transmission line practice (ground plane, constant impedance, no stubs, matched load, ...) gets quite attractive. Russell McMahon * Contrived example. Assumes falling clock causes reflections up to end of Tfall. You now have tlow for reflections to cease if not to interfere with clock at source. Tlow = 1 nS = 1 light foot at light speed. = 6 inches return = 3 inches at propagation factor of 0.5. -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist