On Wed, May 26, 2010 at 03:14:15PM -0400, Xiao Xu wrote: > PIC 84 microprocessors have instruction sets that are 14 bits long, Along with all the other 16F midrange processors. > but there are only 35 instructions. That is correct. > So wouldn't it be more efficient to make each the instruction sets 6 > bits, then you can represent 2^6=64 instructions, which is more than > you need. That would take care of the instruction opcode. > What's the point of the 8 extra bits? To handle the operands. Let's take a look at a few examples. For example you have the instruction MOVLW, which takes an 8 bit integer and puts it into the W register. The opcode pattern for this is 110000, which is the six bits you outlined above. But what about the actual number to be loaded. It also has to be stored. And if you have a 6 bit wide instruction store, then you would first have to have 2 six bit slots (one for the opcode, the other for the number) and the number would be limited to 6 bits instead of 8. Or how about a GOTO? It starts with the bit pattern 101. But you still have to specify what address to goto. with 6 bit words, it would take 1 or 2 extra words to specify the address. The whole point of the 14 bit instruction is that everything you need can be specified in 14 bits. with MOVLW it's 110000kkkkkkkk (where the k's are the 8 bit number loaded into W) and for GOTO it's 101ttttttttttt (where the t's are the 11 bits of the lower address of the target. The rest is gotten from the PC LATCH). Hope this helps, BAJ > - Xiao Xu > -- > http://www.piclist.com PIC/SX FAQ & list archive > View/change your membership options at > http://mailman.mit.edu/mailman/listinfo/piclist -- Byron A. Jeff Program Coordinator: IT/CS/CNET College of Information and Mathematical Sciences Clayton State University http://cims.clayton.edu/bjeff -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist