I have a small battery (a Varta 3.6v) and a solar cell (6V 15mA max output). I intend to use the solar cell to keep the battery topped up. The battery can withstand a 4mA charge current for life and "normal charging" is around the same level as the max output from the panel. Therefore I am not too worried about connecting the panel directly to battery (through a diode) for charging. The circuit uses a PIC and a 3.3v LDO regulator. I'd like to monitor the battery from the uC so it can report back the current status. If I simply hook the battery +ve to an ADC input (through a 1/2 resistor divider) it could be affected by the current solar panel voltage. I have played around with a few mechanisms for disconnecting the cell from the battery and would like some input as to what I have missed and what might work better. I wanted the cell to charge even if the PIC was dead, a "turn on to charge, off to measure" system would be slightly silly. I also thought that it might be nice to measure the solar cell voltage too, so did not consider the possibility of simply shorting it for the duration of ADC measurement. A PNP transistor is obviously the easiest solution, but the voltage drop across it might affect charging capability (perhaps this is the obvious solution that I need to understand better). I played with a P channel FET instead but when the solar voltage is higher than 3.3v the uC cannot turn it off (my rudimentary understanding is that this is because the channel through the FET will not collapse if Vgs is lower than the voltage across the FET). I then (with some assistance from somebody much smarter) played with other combinations of N-FET and P-FETs, learning a lot in the process but ending up with probably larger and more unwieldy configurations than necessary. So within the following rough criteria, what is the best solution? - uC output HIGH disengages the solar from battery, so that it can charge even if the PIC is dead (due to low battery) - lowish voltage drop, charge voltage should be >3.6v (cell output is 5v-5.5v measured in very sunny conditions, so likely to be less on a cloudy day) - if possible, allows measurement of the solar cell voltage too - if possible, draws little current so it is not burning power whilst sitting there idle For now I have dropped back to a P channel FET with an N channel FET to turn it on/off by pulling the P FET gate to Vsolar, to avoid issues with uC output being lower than Vsolar. Whilst the measurement works well it fails criteria 1 above. First post, so apologies if it is long and boring. But the list seems to like detail. This is for fun not profit, but I\'d still like to understand the reasons behind how things work. David -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist