>> I am using this circuit to protect my device from input polarity
>> reversal:

>> I am aware of the restriction on max VGS, but what about max VGD? What
>> is the limitation on that?

> Usually there is no explicit limitation on the drain to gate voltage. =A0=
Keep
> within the spec for gate-source and drain-source voltage (and of course
> anything else in the datasheet) and it will be fine.

What he said.

This circuit was patented just a few years ago (*) and allowed by (**)
the USPTO. Presumably that means you'll have to pay royalties to use
it. [The circuit is as old as MOSFETs are, if not older]. A
marvellously arcane use of quadrant 3 operation of a MOSFET to fool
the uninitiated.

I use that circuit in the"SL2" light - reversed batteries really ruin
the products day and the battery contacts used did not lend themselves
to the normal anti-reversal methods.

Given FET ratings and available voltages I effectively just connect
gate directly to the other rail. Works nicely. With 3 x NimH cells I
couldn't afford the voltage drop that a Schottky diode gives.


         Russell

*    by some turkey
**  some incompetent turkey in

-- =

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