William "Chops" Westfield wrote: > > Yeah, there were bank switching schemes in Z80 systems, and the > original 8086s up through the 286 had lovely segment schemes where you > could address much more than 64k of memory using only 16bit pointers > and such. People were a lot happier when the address space got > linear; we don't like bank switching schemes even on tiny little CPUs > like a PIC. Agreed. The 8086 was really an 8085 in disguise. Compare 8bit 18FxxJxx with 8bit 16F84. Some 16 bit CPUs have 1Mbyte or linear addressing. most 8 bit cpus have 64K linear addressing, my point is that the general bit width of data word, accumulator, gp registers and instruction width doesn't need to be related to the registers for indirect addressing, the stack pointer, program counter etc. Even fully 64bit OS and and CPU many laptops can only address 3Gbyte physical RAM of the 4G RAM installed. It would have been / is trivial compared to a full 64bit CPU to design a 32 bit CPU with 32G Byte RAM addressing simply by 32 bit word addressing on a 32 bit data bus, or by having 36 bit address bus. A plain 32 bit CPU and suitable mother board with 32bit address can address 4Gbyte, or using PAE 64Gbyte, PAE is hardly the same level of pain as 64K byte 8086 segements. Actual x64 CPUs don't have 64bit physical address bus, though 256 TeraBytes is plenty RAM :) The point is there are two separate aspects here. 1) The ability to manipulate 64 bit data 2) The linear address space. Yes, bigger bit word CPUs tend to have larger linear address space, but linear address space size is a design decision separate from the number of bits per word for data or instructions. If you really need more than 3G of RAM, don't assume a 4G fitted laptop can actually address it. Make sure the Motherboard really supports >16GByte and non-PAE addressing above 4Gbyte when you buy a new 64bit system. -- http://www.piclist.com PIC/SX FAQ & list archive View/change your membership options at http://mailman.mit.edu/mailman/listinfo/piclist